Henk Corporaal
![[my face]](henk.jpg) |
Professor Emeritus Embedded System Architectures
Eindhoven University of Technology ( TU/e ),
Department of Electrical Engineering
Electronic Systems (ES)
FLUX building (4.134), Groeneloper 19
tel: (+31) 40 247 5462 / 5195
email: h.corporaal at tue.nl
Postal
address:
P.O.Box 513
5600 MB Eindhoven
The Netherlands
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News items <2025
- HW
accelerators and FIRE workshop (SURF supported): Dec
6, 2024
- Keynote on: Edge AI HW accelerators
- VLSISoC
2024 in Tanger, Morocco, Oct 6-9, 2024
- Keynote:
"AI at the edge: Hype or Hope?
- Tutorial:
Processors: From Intel 4004 to Neuro Chips
- SNS:
Self-healing Neuromorphic Systems
- Kick-off Aug 28, 2024
- Partners: TUD, CWI, Innatera, IMEC NL, RUG, and TUE
- DAC special
session on "Emerging Technologies for Energy-efficient
Neuromorphic Edge Computing, June 26, 2024
- NeuroEdge:
workshop about brain-inspired computing, at HiPEAC Jan 2024,
Munich
- Nov
28 - Dec 1, 2023: ASCI-EDL
course on Efficient Deep Learning
- German
edition (Sep 2023) of our book on CGRAs.

It includes 25 years CGRA history overview.
- Blocks: Auf dem Weg zu
Energieeffizienten, Grobkörnigen, Rekonfigurierbaren
Architekturen (CGRA)
Springer 2023
- English (2021) version:
- Blocks, Towards Energy-efficient, Coarse-grained
Reconfiguarable Architectures
Mark Wijtvliet, Henk Corporaal, Akash Kumar
Springer 2021
- New seminal paper on Flexibility: How
flexible is your computing system?
- The first in-depth article about defining and
measuring the flexibility of a CPU / GPU /
accelerator or FPGA implementation.
- New paper on: ConvFusion: A Model for Layer
Fusion in Convolutional Neural Networks
- In-depth modeling of
layer fusion in Deep Neural Networks, and its
advantages.
- Fusion is the next step in
getting higher data reuse in ANNs, and therefore in
energy reduction and performance improvement of ANN
implementations.
- Nov 2022: EU project started, CONVOLVE: Seamless design of
Smart Edge Processors
- HORIZON-CL4 project with 18 partners
- Our large program on Efficient Deep
Learning, supported by NWO and over 30
industrial companies, is in its 4th year. Kick-off was in
January 2019. This program contains 7 projects.
- The ZERO perspectief
program, on zero energy systems, started early 2018,
is now in its 5th year. This program contains 5 projects.
Research and running projects
All my projects, both
currently active projects and finished projects.
This includes projects executed at TUD (Delft University of
Technology) (1986-2001), and at TU/e (Eindhoven University of
Technology), since 2001.
My current research is executed withing the PARSE laboratory.
- PARSE:
Parallel Architecture Research Eindhoven
- This is the main site of our TU/e Computer Architecture
research lab
- Among others, we are researching CGRAs, coarse grain
reconfigurable architectures for flexible and extreme low energy
computing; see our CGRA website
Education
- An overview of most of my current and previous Courses
- Includes course at TU/e (Eindhoven), TUDelft, Leiden
University, NUS (National Univ. of Singapore), and for ASCI
(Advanced Institute on Computing and Imaging, The
Netherlands).
- Interested in a mini Network-on-Chip targeted towards FPGAs?
Check out our
mMIPS Network page.
We used this in several courses on computer architecture.
- My PhD & PDEng students at TU/e
/ TUDelft / KUleuven
- Master students (pdf) at TU/e and TUDelft, since 1986
- Literature suggestions on
computer architecture and embedded systems. Overview of
interesting conferences and journals.
Software and Tools from our group
- Extension of SDF: SADF
(Scenario Aware Data Flow), combining analytic power of
(C)SDF with dynamism
- MAMPS Multi-Application
Multi-Processor
Synthesis
- SDF3: SDF For
Free, a set of high freely available SDF (Synchronous Data Flow)
and CSDF (Cyclo-Static Data Flow) analysis, transformation,
graph generation and visualization tools
- POOSL,
System-Level Design with the SHE Methodology.
POOSL (Parallel Object-Oriented Specification Language) is used
to describe, analyse and synthesize hard- and soft-realtime
systems. Synthesis is correct modulo a small timing deviation,
i.e. the implemented system has the same timing properties as
the high level description in POOSL.
- PREMADONA
tools: Generate simulation models from XML specifications
of NoC-based MPSOC systems.
- Always wanted to know what users do with your products? Check
our tools
within the soft
reliability project.
- Is your application dynamism getting out of control? Check our
Wiki
Scenario page.
Other links
How to contact me
Phone: (+31) 40-247 5462 / 5195
(secr.)
Fax: (+31) 40-243 3066
E-Mail: H.Corporaal at tue dot
nl